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Books:

B.1. Chetan Kumar Dabhi, Debashish Nandi, Dinesh Rajasekharan, Chenming Hu, Yogesh Singh Chauhan and Ananth Sundaram, “BSIM–SOI Industry-Standard Compact Model: Surface Potential-Based FET Model for RFIC Design”, Woodhead Publishing, Elsevier, ISBN: 9780443439049, 2026. Book Link

Journal Articles:

J.9. D. Nandi and Y. S. Chauhan, “Compact Modeling of MOS Transistors: A Paradigm of Evolutionary Research”, in IEEE Electron Devices Magazine (M-ED), 2026, doi: 10.1109/MED.2026.3741556. (invited).

J.8. D. Nandi, C. K. Dabhi, D. Rajasekaran, N. Karumuri, S. Turuvekere, A. Dutta, B. Swaminathan, S. Srihari, C. Hu, and Y. S. Chauhan, “Nonlinear Body Resistance in SOI MOSFETs under Dynamic Depletion: Compact Modeling and DC Characterization”, in IEEE Transactions on Electron Devices (T-ED), 2026, doi: 10.1109/TED.2026.3652538.

J.7. N. Manzoor, D. Nandi, C. K. Dabhi, A. K. Dutta, and Y. S. Chauhan, “Modeling of Gate-Induced-Drain-Leakage Under Low Electric Field in FDSOI MOSFETs”, in IEEE Transactions on Electron Devices (T-ED), 2025, doi: 10.1109/TED.2025.3601574.

J.6. N. Manzoor, W. Manzoor, D. Nandi, A. K. Dutta, and Y. S. Chauhan, “Characterization and Modeling of Fully-Depleted SOI Varactor with Independently-Controlled Front- and Back-Gates for RF Applications”, in IEEE Transactions on Electron Devices (T-ED), 2025, doi: 10.1109/TED.2025.3566930.

J.5. Y. H. Zarkob, D. Rajasekharan, A. Pampori, A. Sharma, G. Pahwa, D. Nandi, C. K. Dabhi, V. Kubrak, B. Peddenpohl, M. Tang, C. Hu, and Y. S. Chauhan, “Impact Ionization in LDMOS Transistors: Improved Compact Model and Asymmetry under Forward and Reverse Modes of Operation”, in IEEE Journal of the Electron Devices Society (J-EDS), 2025, doi: 10.1109/JEDS.2025.3529730.

J.4. D. Nandi, C. K. Dabhi, D. Rajasekharan, N. Karumuri, S. Turuvekere, B. Swaminathan, S. Srihari, A. Dutta, C. Hu, and Y. S. Chauhan, “Utilizing Symmetric BSIM-SOI SPICE model for Dynamically Depleted RF SOI T/R Switches and Logic Circuits”, in IEEE Journal of the Electron Devices Society (J-EDS), 2025, doi: 10.1109/JEDS.2024.3484295.

J.3. D. Nandi, C. K. Dabhi, D. Rajasekaran, N. Karumuri, S. Turuvekere, S. Choppalli, A. S. Pratiyush, C. Hu, and Y. S. Chauhan, “Physical Insights and Accurate Modeling of Transconductance in Body-contacted Dynamically Depleted SOI MOSFETs”, in IEEE Transactions on Electron Devices (T-ED), 2024, doi: 10.1109/TED.2024.3461670.

J.2. C. K. Dabhi, D. Rajasekaran, G. Pahwa, D. Nandi, N. Karumuri, S. Turuvekere, A. Dutta, B. Swaminathan, S. Srihari, Y. S. Chauhan, S. Salahuddin, C. Hu, “Symmetric BSIM-SOI Part-I: A Compact Model for Dynamically Depleted SOI MOSFETs”, in IEEE Transactions on Electron Devices (T-ED), 2024, doi: 10.1109/TED.2024.3363110.

J.1.  C. K. Dabhi*, D. Nandi*, K. Nandan, D. Rajasekaran, G. Pahwa, N. Karumuri, S. Turuvekere, A. Dutta, B. Swaminathan, S. Srihari, Y. S. Chauhan, S. Salahuddin, C. Hu, “Symmetric BSIM-SOI Part-II: A Compact Model for Partially Depleted SOI MOSFETs”, in IEEE Transactions on Electron Devices (T-ED), 2024, doi: 10.1109/TED.2024.3363117. [*equal contribution first authors]

Conference Papers:

​C.8. N. Manzoor, D. Nandi, A. K. Dutta, and Y. S. Chauhan, “An All-Region Gate-Induced-Drain-Leakage Current Model for FDSOI MOSFETs Valid down to Cryogenic Temperatures”, in IEEE International Conference on Emerging Electronics (ICEE), Bengaluru, India, 2025, doi: 10.1109/ICEE67165.2025.11409757.

C.7. D. Nandi, C. K. Dabhi, D. Rajasekharan, N. Karumuri, S. Turuvekere, S. Choppalli, A. Dutta, C. Hu, and Y. S. Chauhan, “Accurate Modeling of Sub-threshold region considering the impact of STI edge conduction in Surface potential-based BSIM-SOI Compact Model Framework”, in IEEE International Compact Modeling Conference (ICMC), San Francisco, USA, 2025, doi: 10.1109/ICMC64879.2025.11102453.

C.6. D. Nandi, C. K. Dabhi, D. Rajasekharan, N. Karumuri, S. Turuvekere, S. S. Parihar, A. Pampori, A. Dutta, C. Hu, and Y. S. Chauhan, “Recent Enhancements in the Industry-Standard Surface potential-based BSIM-SOI Compact Model”, in IEEE International Compact Modeling Conference (ICMC), San Francisco, USA, 2025, doi: 10.1109/ICMC64879.2025.11102539.

C.5. N. Manzoor, W. Manzoor, D. Nandi, A. K. Dutta, and Y. S. Chauhan, “Compact Modeling of Kink Effect in BULK MOSFETs at Cryogenic Temperatures”, in IEEE Electron Devices Technology & Manufacturing Conference (EDTM), Hong Kong, China, 2025, doi: 10.1109/EDTM61175.2025.11041337.

C.4. W. Manzoor, N. Manzoor, Y. H. Zarkob, D. Nandi, A. K. Dutta, and Y. S. Chauhan, “Benchmarking of the BSIM-BULK for Cryo-CMOS Design”,  in IEEE Electron Devices Technology & Manufacturing Conference (EDTM), Hong Kong, China, 2025, doi: 10.1109/EDTM61175.2025.11041565.

C.3. D. Nandi, C. K. Dabhi, D. Rajasekharan, N. Karumuri, S. Turuvekere, B. Swaminathan, S. Srihari, A. Dutta, C. Hu and Y. S. Chauhan,  “Validation of Dynamically Depleted Symmetric BSIM-SOI Compact model for RF SOI T/R Switch Applications”, in IEEE Electron Devices Technology & Manufacturing Conference (EDTM), Bangalore, India, 2024, doi: 10.1109/EDTM58488.2024.10512295.

C.2. Y. H. Zarkob, A. Sharma, G. Pahwa, D. Nandi, C. K. Dabhi, V. Kubrak, B. Peddenpohl, M. Tang, C. Hu and Y. S. Chauhan, “Compact Modeling and Experimental validation of Reverse Impact Ionization in LDMOS transistors within the BSIM-BULK framework”, in IEEE Electron Devices Technology & Manufacturing Conference (EDTM), Bangalore, India, 2024, doi: 10.1109/EDTM58488.2024.10512085.

C.1. G. Kumar, M. Singh, G. Trivedi and D. Nandi, “Bandgap generation in 2D materials”, in IEEE Conference on Devices for Integrated Circuit (DevIC), 2017, doi: 10.1109/DEVIC.2017.8074011.

Industry-Standard SPICE/Compact Models:

​BSIM-SOI 100 (click here for accessing the release packages)
M.8. BSIM-SOI 101.0.0 (Released on: 15-Sep-2026) Latest!
M.6. BSIM-SOI 100.1.2 (Released on: 15-Sep-2026)
M.5. BSIM-SOI 100.1.1 (Released on: 15-Sep-2025)
M.3. BSIM-SOI 100.1.0 (Released on: 17-Oct-2023)
M.2. BSIM-SOI 100.0.1 (Released on: 20-Apr-2023)
M.1. BSIM-SOI 100.0.1 (Released on: 06-Dec-2022)

​BSIM-SOI 4 (click here for accessing the release packages)
M.7. BSIM-SOI 4.7.1 (Released on: 07-Oct-2026) Latest!
M.4. BSIM-SOI 4.7.0 (Released on: 19-May-2025)

Note: Beta codes are exclusive avaialble to BSIM-SOI CMC Work Group members only!

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